fix: improve scheduling, memory, timer implementations
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@@ -11,6 +11,7 @@
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#include <Hal/MSR.hpp>
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#include <Hal/Cpu.hpp>
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#include <Memory/Paging.hpp>
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#include <Memory/PageFrameAllocator.hpp>
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#include <Memory/HHDM.hpp>
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#include <Terminal/Terminal.hpp>
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#include <CppLib/Stream.hpp>
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@@ -60,6 +61,14 @@ namespace Smp {
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memset(&cpu.cpuTss, 0, sizeof(Hal::TSS64));
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cpu.cpuTss.iopbOffset = sizeof(Hal::TSS64);
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// Allocate a 4KB IST1 stack for Double Fault and NMI.
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// These exceptions need a known-good stack to avoid triple
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// faults when the normal kernel stack overflows.
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void* istPage = Memory::g_pfa->AllocateZeroed();
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if (istPage) {
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cpu.cpuTss.ist1 = (uint64_t)istPage + 0x1000; // top of stack
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}
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// Copy the standard GDT layout
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cpu.cpuGdt = {
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{0xFFFF, 0, 0, 0x00, 0x00, 0}, // 0x00 Null
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@@ -122,10 +131,17 @@ namespace Smp {
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bsp.lapicId = Hal::LocalApic::GetId();
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bsp.currentSlot = -1;
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bsp.started = true;
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bsp.hasMwait = Hal::HasMwait();
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// BSP uses the global TSS (already set up in PrepareGDT)
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bsp.tss = &Hal::g_tss;
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// Allocate IST1 stack for the BSP (for Double Fault / NMI)
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void* bspIstPage = Memory::g_pfa->AllocateZeroed();
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if (bspIstPage) {
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Hal::g_tss.ist1 = (uint64_t)bspIstPage + 0x1000;
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}
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// Set GS base for BSP
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SetGSBase(&bsp);
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@@ -187,14 +203,25 @@ namespace Smp {
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// --- Calibrate and start APIC timer ---
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Timekeeping::ApicTimerInitializeAP();
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// --- Check MWAIT support ---
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cpu->hasMwait = Hal::HasMwait();
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// --- Signal that we are online ---
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cpu->started = true;
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// --- Enable interrupts and enter idle loop ---
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asm volatile("sti");
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for (;;) {
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asm volatile("hlt");
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// Use MWAIT for deeper C-states if available, otherwise HLT.
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static volatile uint64_t s_idleMonitor = 0;
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if (cpu->hasMwait) {
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for (;;) {
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Hal::IdleWait(&s_idleMonitor);
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}
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} else {
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for (;;) {
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asm volatile("hlt");
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}
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}
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}
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