feat: e100e Ethernet driver, ramdisk reorganization, shell rewrite, web server/client, and more

This commit is contained in:
2026-02-19 01:18:11 +01:00
parent 1a5d943649
commit d355d376f9
63 changed files with 5368 additions and 614 deletions
+26
View File
@@ -223,6 +223,32 @@ namespace Pci {
return LegacyRead8(bus, device, function, (uint8_t)offset);
}
// -------------------------------------------------------------------------
// PCI capability list traversal
// -------------------------------------------------------------------------
uint8_t FindCapability(uint8_t bus, uint8_t device, uint8_t function, uint8_t capId) {
// Check Status register bit 4 (Capabilities List present)
uint16_t status = ReadConfig16(bus, device, function, RegStatus);
if (!(status & (1 << 4))) {
return 0;
}
// Read Capabilities Pointer (offset 0x34), mask to dword-aligned
uint8_t offset = ReadConfig8(bus, device, function, 0x34) & 0xFC;
// Walk the linked list (cap_id @ +0, next_ptr @ +1)
while (offset != 0) {
uint8_t id = ReadConfig8(bus, device, function, offset);
if (id == capId) {
return offset;
}
offset = ReadConfig8(bus, device, function, offset + 1) & 0xFC;
}
return 0;
}
// -------------------------------------------------------------------------
// PCI class code names
// -------------------------------------------------------------------------
+7
View File
@@ -60,6 +60,13 @@ namespace Pci {
void LegacyWrite16(uint8_t bus, uint8_t device, uint8_t function, uint8_t offset, uint16_t value);
void LegacyWrite32(uint8_t bus, uint8_t device, uint8_t function, uint8_t offset, uint32_t value);
// PCI capability IDs
constexpr uint8_t PCI_CAP_MSI = 0x05;
// Walk the PCI capability linked list for a given device.
// Returns the config-space offset of the capability, or 0 if not found.
uint8_t FindCapability(uint8_t bus, uint8_t device, uint8_t function, uint8_t capId);
// Class code name lookup
const char* GetClassName(uint8_t classCode, uint8_t subClass);