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feat: userspace overhaul, Intel GPU driver, and more

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This commit is contained in:
Daniel Hammer
2026-02-19 15:46:49 +01:00
parent d355d376f9
commit cae7dd352e
55 changed files with 9080 additions and 270 deletions
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kernel/src/Hal/MSR.hpp
+29
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@@ -26,5 +26,34 @@ namespace Hal {
static constexpr uint32_t IA32_STAR = 0xC0000081;
static constexpr uint32_t IA32_LSTAR = 0xC0000082;
static constexpr uint32_t IA32_FMASK = 0xC0000084;
static constexpr uint32_t IA32_PAT = 0x00000277;
// PAT memory type encodings
static constexpr uint8_t PAT_UC = 0x00; // Uncacheable
static constexpr uint8_t PAT_WC = 0x01; // Write Combining
static constexpr uint8_t PAT_WT = 0x04; // Write Through
static constexpr uint8_t PAT_WP = 0x05; // Write Protect
static constexpr uint8_t PAT_WB = 0x06; // Write Back
static constexpr uint8_t PAT_UCM = 0x07; // UC- (UC minus)
// Program PAT so entry 1 = WC (default is WT).
// PAT index is selected by PTE bits: PAT(bit7) | PCD(bit4) | PWT(bit3)
// Entry 0 (000) = WB — normal memory (unchanged)
// Entry 1 (001) = WC — framebuffers (was WT)
// Entry 2 (010) = UC- — (unchanged)
// Entry 3 (011) = UC — MMIO registers (unchanged)
// Entries 4-7: unchanged from defaults
inline void InitializePAT() {
uint64_t pat =
((uint64_t)PAT_WB << 0) | // Entry 0: WB
((uint64_t)PAT_WC << 8) | // Entry 1: WC (was WT)
((uint64_t)PAT_UCM << 16) | // Entry 2: UC-
((uint64_t)PAT_UC << 24) | // Entry 3: UC
((uint64_t)PAT_WB << 32) | // Entry 4: WB
((uint64_t)PAT_WT << 40) | // Entry 5: WT
((uint64_t)PAT_UCM << 48) | // Entry 6: UC-
((uint64_t)PAT_UC << 56); // Entry 7: UC
WriteMSR(IA32_PAT, pat);
}
}