refactor: kernel entry point - add architecture preprocessor checks and move module to Boot
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@@ -12,4 +12,4 @@
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#pragma once
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#define MONTAUK_BUILD_NUMBER 119
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#define MONTAUK_BUILD_NUMBER 120
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@@ -1,7 +1,8 @@
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/*
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* main.cpp
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* Kernel entry point
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* Copyright (c) 2025 Daniel Hammer, Limine Contributors (via Limine C++ example)
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* Copyright (c) 2025 Daniel Hammer.
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* Further copyright information and third party notices can be found at https://montaukos.org/license.txt.
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*/
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#include <cstdint>
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@@ -29,7 +30,6 @@
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#include <Drivers/PS2/Keyboard.hpp>
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#include <Drivers/PS2/Mouse.hpp>
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#include <Drivers/Init.hpp>
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#include <Drivers/USB/Bluetooth/Bluetooth.hpp>
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#include <Graphics/Framebuffer.hpp>
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#include <Hal/MSR.hpp>
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#include <Hal/Cpu.hpp>
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@@ -63,11 +63,6 @@ extern "C" void kmain() {
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__init_array[i]();
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}
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// Acquire the boot environment through the Montauk Boot Contract. The
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// active bootloader adapter (see Boot/Protocols/) translates its native
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// handoff into this bootloader-agnostic structure. A false return means
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// we cannot even bring up a console (unsupported loader, no HHDM, or no
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// framebuffer) -- there is nothing to do but halt.
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if (!montauk::boot::Initialize()) {
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Hal::Halt();
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}
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@@ -119,20 +114,13 @@ extern "C" void kmain() {
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Memory::VMM::g_paging = &g_paging;
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g_paging.Init((uint64_t)&KernelStartSymbol, ((uint64_t)&KernelEndSymbol - (uint64_t)&KernelStartSymbol), boot.memoryMap, framebuffer);
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// Reprogram PAT so entry 1 = Write-Combining (default is Write-Through).
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// Must be done after paging init and before any WC mappings.
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Hal::InitializePAT();
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Kt::KernelLogStream(OK, "Hal") << "PAT reprogrammed (entry 1 = WC)";
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#endif
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// Initialize the framebuffer early so we can WC-map it before
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// the bulk of boot logging begins (ACPI, PCI, drivers, etc.)
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Graphics::Framebuffer::Initialize(framebuffer);
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#if defined (__x86_64__)
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// Map framebuffer as Write-Combining immediately for faster screen writes.
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// All subsequent log output benefits from WC burst transfers.
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Graphics::Framebuffer::MapWriteCombining();
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#endif
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@@ -145,19 +133,12 @@ extern "C" void kmain() {
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Hal::ApicInitialize(g_acpi.GetXSDT());
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// Set up BSP per-CPU data (GS base) before enabling interrupts.
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// ISR stubs use SWAPGS which requires GS base to point to CpuData.
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Smp::InitBsp();
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// Enable hardware P-state scaling and the thermal governor.
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// Needs GS base (per-CPU data) set up, and must run before the
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// APs boot so they inherit the shared policy in ApEntry.
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Hal::CpuPower::InitializeBsp();
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// Now safe to enable interrupts (SWAPGS-aware ISR stubs are installed)
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asm volatile("sti");
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// Initialize ACPI events (SCI, power button) after APIC is ready
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Hal::AcpiEvents::Initialize(g_acpi.GetXSDT());
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Pci::Initialize(g_acpi.GetXSDT());
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@@ -186,29 +167,32 @@ extern "C" void kmain() {
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Fs::InitializeBootFilesystems(boot.modules);
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#if defined (__x86_64__)
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Hal::LoadTSS();
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#endif
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montauk::abi::InitializeSyscalls();
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Sched::Initialize();
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Ipc::Initialize();
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// Boot Application Processors (all subsystems ready, APs can schedule)
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#if defined (__x86_64__)
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Smp::BootAPs(boot.smp);
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#endif
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// Flush any stale PS/2 mouse bytes that accumulated during boot
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// (edge-triggered IRQs can be lost while spinlocks disable interrupts)
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#if defined (__x86_64__)
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Drivers::PS2::Mouse::FlushState();
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#endif
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Kt::SuppressKernelLog();
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Sched::Spawn("0:/os/init.elf");
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// Enable preemptive scheduling via the APIC timer
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Timekeeping::EnableSchedulerTick();
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// Main loop: idle until next interrupt.
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#if defined (__x86_64__)
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// Use MWAIT for deeper C-states if available, otherwise HLT.
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auto* bspCpu = Smp::GetCpuData(0);
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if (bspCpu && bspCpu->hasMwait) {
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static volatile uint64_t s_bspIdleMonitor = 0;
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for (;;) {
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@@ -219,4 +203,9 @@ extern "C" void kmain() {
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Timekeeping::IdleOnce(false);
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}
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}
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#else
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for (;;) {
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Timekeeping::IdleOnce(false);
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}
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#endif
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}
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